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Generate a N bits four inputs AND with an output power of drive named modelname.
Valid drive are : 2 or 4.
GENLIB_MACRO(DPGEN_AND4, "model_and4_32" , F_BEHAV|F_PLACE , 32 , 2 ); GENLIB_LOINS( "model_and4_32" , "instance1_and4_32" , "i3[31:0]" , "i2[31:0]" , "i1[31:0]" , "i0[31:0]" , "q[31:0]" , "vdd", "vss", NULL ); |
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